1. Field of the Invention
The present invention relates to an apparatus and method of doping ions into a substrate for use in the fabrication of semiconductor devices. More particularly, the invention relates to a doping apparatus having a process chamber with inner surfaces resistant to etching by processing gases and a doping method using the same.
2. Description of the Related Art
A semiconductor device is generally manufactured through a plurality of sequentially and selectively repeated unit processes such as a deposition process, an etching process, an ion implantation process, a polishing process, a cleaning process and a drying process. Among the above unit processes, the ion implantation process generates an ion beam that implants p-type or n-type impurities onto a substrate. The selective implantation of ions may be used to control the resistivity characteristics of the substrate. P-type impurities generally include an element having five-valence-electron atoms, such as boron (B), aluminum (Al) or indium (In), and the n-type impurities include an element having three-valence-electron atoms, such as antimony (Sb), phosphorus (P) or arsenic (As).
A doping process such as an ion implantation is designed to change the physical and electrical properties of the substrate by implanting a defined quantity of impurity ions into the substrate at a desired depth. Thermal diffusion is commonly used as part of an ion implanting process. However, the accuracy with which impurity ions may be directly implanted into the substrate by the ion beam during an implantation process is much greater than that of a subsequently performed thermal diffusion process. This is particularly so for a plasma ion implantation which may be used to form very fine implantation patterns in contemporary semiconductor devices. The plasma ion implantation process is able to achieve this accuracy because the exact implantation depth may be determined by controlling the voltage generating plasma in a constituent process chamber instead of controlling the energy level of an ion beam used to accelerate impurity ions into the substrate.
Figure (FIG.) 1 illustrates the general configuration of a conventional plasma ion implantation apparatus 90. Referring to FIG. 1, apparatus 90, commonly referred to as a plasma ion implanter includes a process chamber 10 formed by chamber walls 14. Process chamber 10 includes a port 12 for loading/unloading a wafer to/from process chamber 10. Chamber walls 14 may be formed from a bulk-aluminum (Al) body without a liner, so as to function as a conductive electrical ground.
A connection port 14a is disposed on an upper portion of chamber walls 14 and may include a coil through which radio frequency (RF) power is supplied to process chamber 10. Connection port 14a is connected to a second power source 60 supplying electrical power to the upper portion of process chamber 10. Second power source 60 may include an RF generator 62 generating RF power and an impedance matching transformer 64 connected to RF generator 62. Connection port 14a may be formed through chamber walls 14 and may comprise aluminum oxide (Al2O3) in order to be electrically insulated from the conductive surroundings, and yet provide sufficient resistant to a cleaning solution of nitrogen trifluoride (NF3) which is commonly used to clean process chamber 10.
A support unit 20 is positioned on a bottom portion of process chamber 10, and a wafer W is secured on support unit 20. Support unit 20 includes a platen 22 holding the wafer W, a platen bushing 24 enclosing platen 22 and isolating platen 22 from processing gases introduced into process chamber 10, a shield ring 26 positioned over platen 22 and platen bushing 24, and a clamp (not shown) securing a peripheral portion of the wafer W to the upper surface of platen 22.
The bottom surface of platen 22 is electrically connected to a first power source 28 so that electrical power may be supplied to process chamber 10 during an ion implantation process. More particularly, first power source 28 applies a high-voltage pulse to platen 22 W such that platen 22 and mounted wafer W function as a cathode during the ion implantation process.
The top surface of platen bushing 24 is coplanar with the flat top surface of platen 22 and encloses platen 22. Platen bushing 24 may be formed from aluminum oxide (Al2O3) like connection port 14a such that platen bushing 24 is electrically insulated from the surrounding conductive elements and sufficiently resistant to a cleaning solution of nitrogen trifluoride (NF3). In this manner, platen 22 may be protected from the processing gases and/or cleaning gases introduced into process chamber 10.
A baffle 30 is arranged at an upper portion of process chamber 10 and is spaced apart from platen 24 by a predetermined distance. Baffle 30 is electrically grounded such that secondary ions generated during the ion implantation process may be discharged through baffle 30. Baffle 30 may be formed from a highly conductive metal such as aluminum (Al). A plurality of cooling tubes may be associated with baffle 30 such that baffle 30 doe not become excessively heated during the ion implantation process. Baffle 30 functions as an anode during the ion implantation process.
An upper portion of process chamber 10 allows the introduction of gases and is connected to a gas supply unit 40. Gas supply unit 40 includes a gas source 42 holding the doping gas(es) used during the ion implantation process, and a flow controller 44 controlling the flow of gas(es) including one or more source gas(es) into process chamber 10. Examples of the source gas include phosphine (PH3), arsine (AsH3) and diborane (B2H6).
A discharge unit 50 is positioned at the bottom portion of process chamber 10, and when operated, extracts gases within process chamber 10 in order to exhaust such gases or create a vacuum environment.
An exemplary operation of ion implanter 90 will now be described. A semiconductor wafer W is loaded onto the upper surface of platen 22 through port 12 of process chamber 10. Then, a source gas which will be changed into implantation ions is introduced into process chamber 10. A high voltage pulse is applied to platen 22 by first power source 28 and RF power is applied to baffle 30 by second power source 60. As a result, discharge plasma is generated between baffle 30 and platen 22. In particular, a plasma sheath is generated around an upper surface of the wafer W. The RF power is continuously applied to baffle 30 by second power source 60 and the discharge plasma is continuously generated between baffle 30 and platen 22. Due to the high voltage pulse is applied to platen 22 on which the wafer W is mounted, positive ions from the discharge plasma are accelerated towards wafer W. The resulting acceleration is proportional to the voltage difference between platen 22 and baffle 30, and the implantation depth is proportional to the acceleration velocity of the positive ions from the discharge plasma. Accordingly, a shallow junction area may be formed in upper surface portions of the wafer W by controlling the voltage difference between platen 22 and baffle 30.
However, the bulk aluminum (Al) and/or the aluminum oxide (Al2O3) materials forming the foregoing elements of ion implanter 90 are directly exposed to the source gas introduced into process chamber 10 as well as any reactive by-products. Thus, the inner surfaces of chamber walls 14, connection port 14a, side surfaces of baffle 30 and platen bushing 24, collectively but not exclusively comprising the “inner surfaces of process chamber 10”, are exposed to potentially corrosive gases.
When the source gas includes one or more hydrogen-based gases, which generally have deposition properties that are relatively superior to etching properties, is introduced into process chamber 10, it minimally reacts with the bulk aluminum (Al) and/or aluminum oxide (Al2O3) forming the inner spaces of process chamber 10 during the ion implantation process. As a result, minimal contamination of the inner surfaces results during the ion implantation process.
However, when the source gas including fluorine-based gases, such as boron trifluoride (BF3), which has etching properties relatively superior to deposition properties, is introduced into process chamber 10, the source gas readily reacts with the bulk aluminum (Al) and/or aluminum oxide (Al2O3) forming the inner surfaces of process chamber 10 during the ion implantation process. The resulting formation of contamination on the inner surfaces may subsequently generate defects in wafers being processed in process chamber 10.
In order to decrease the processing defects caused by these contaminants, a protection layer is formed on the inner surfaces of the process chamber prior to performing an ion implantation process that uses a fluorine-based gas. For example, a diborane (B2H6) layer or a silicon dioxide (SiO2) layer may be formed on the inner surfaces prior to performance of an ion implantation process using a fluorine-based gas. Unfortunately, the formation of the protection layer requires time and resources better used in the actual fabrication of semiconductor devices, and often does not adequately cover the inner surfaces of process chamber 10.
Indeed, experimental data suggests that the formation process of a protection layer takes almost as long as the actual ion implantation process. Thus, the efficiency of fabrication processing at process chamber 10 drops by about 50% when a protection layer is incorporated. This drop in throughput efficiency is particularly notable since conventional ion implantation processes are usually performed for lots of 25 wafers. Since ion implantation is performed serially for the 25 wafers, the incorporation of a protection layer for each ion implantation process is a significant overhead commitment.
Experimental data also suggests that the reduction in Al contaminants caused by the ion implantation process is not materially reduced by a protection layer, since its coverage of the inner surfaces of process chamber 10 is not complete. This is particularly true for serial batch processing of multiple wafers between cleaning cycles.
Table 1 shows an accumulated amount of Al contaminants detected on the surface of test wafers during a batch sequence of ion implantation processes.
TABLE 1Wafer NumberAmount of Al contaminants (E10 atoms/cm2)Wafer 10.01Wafer 21,070Wafer 3145.3Wafer 4886.7Wafer 51,283
Each wafer in Table 1 underwent ion implantation process at a dosage of about 2E15 at an electrical power level of about 7 kV using boron trifluoride (BF3) gas as a source gas. Further, a protection layer was formed on the inner surfaces of process chamber 10 prior to the sequence of ion implantation processes using argon (Ar) gas and diborane (B2H6) gas. Wafer 1 was the first wafer undergoing the ion implantation process following formation of the protection layer on the inner surfaces of process chamber 10. Wafer 2 was the 25th wafer undergoing the ion implantation process. Following the processing of Wafer 2, a second protection layer was formed on the inner surfaces of process chamber 10. Wafer 3 was the first wafer undergoing the ion implantation process following formation of the second protection layer on the inner surfaces of process chamber 10. Wafer 4 was the 25th wafer undergoing the ion implantation process following formation of the second protection layer on the inner surfaces of process chamber 10. Wafer 5 was the 40th wafer undergoing the ion implantation process following formation of the second protection layer on the inner surfaces of process chamber 10. The amount of accumulated Al contaminants on the surface of each wafer was measured by inductively coupled plasma mass spectrometry (ICP-MS). Referring to Table 1, the increasing amount of accumulated Al contaminants clearly indicates inadequate coverage of the inner surfaces of process chamber 10 by either the first or second protection layers.
FIG. 2 is a graph showing the amount of Al contaminants on the surface of respective wafers in a batch of wafers undergoing an ion implantation process. Here again, the amount of Al contaminants was measured using surface secondary ion mass spectrometry (surface SIMS). The horizontal axis indicates a sequential wafer number and the vertical axis indicates the measured amount of Al contaminants expressed in atoms per cubic centimeter of the wafer surface.
A first protection layer was formed on the inner surfaces of process chamber 10 prior to processing of Wafer 1 and a second protection layer was formed prior to processing Wafer 26. In this regard, Wafers 1-25 were subjected to a first ion implantation process and Wafers 26-49 were subjected to a second ion implantation process.
Referring to FIG. 2, the amount of measured Al contaminants increases almost linearly during the sequence of implantation processes. Furthermore, the resulting increase in Al contaminants in the first ion implantation process is almost the same as that in the second ion implantation process. That is, FIG. 2 shows that the increase in Al contaminants on a surface of wafers being processes is substantially the same for different ion implantation processes uses similarly contaminating gas components.
As indicated by the results shown in Table 1 and FIG. 2, the use of a protection layer is inadequate to prevent the formation of Al contamination on the inner surfaces of process chamber 10 when one or more fluorine-based gas(es) is used as the source gas for the ion implantation process. And this result arises after the process efficiency hit required to form the protection layer prior to performing the ion implantation process.